About the Role
In this role you are responsible for system level and integration verification of the designs, as they are produced by the RTL design team. You will also have to provide feedback during the architecture exploration process for future generation designs. You will work on SOC level designs, within a multi-power domain, and will be responsible for building our verification architecture.
About us
SEMRON develops a 3D scaled AI inference chip, incorporating GPT-3.5-like models on a square cm silicon with minimal power consumption. This revolutionary CMOS-compatible semiconductor technology enables running generative AI at the edge, making it possible for wearable tech, smartphones, and beyond. With a trend towards large foundation models, SEMRON can serve multiple markets with minimal adjustments and simplify the software stack.