About the Role

In this role, you will be building the digital part of the SEMRON’s future chip generations.
You will design, verify and optimize digital design to meet ambitious performance targets.

What you will do:

• design digital part of SEMRON’s AI accelerator
• contribute to system architecture exploration efforts
• work closely with analog and software team to exchange requirements and implement them
• conduct power, performance and timing analysis

What you should bring in:

• in-depth knowledge in RTL design
• experience with RTL simulation tools
• a good understanding in digital design trade-offs
• basic knowledge on scripting (e.g. tcl, python) and systems programming (e.g. C, C++)

Helpful but not required:

• experience in verification
• experience in mixed signal simulation
• experience with the Chisel HDL
• experience with RISC-V