<?xml version="1.0" encoding="UTF-8"?>

<workzag-jobs>

<position>
    <id>1992893</id>
    <office>Dresden, DE (primary site)</office>
    <department>Administration</department>
    <recruitingCategory>Default - Tilmann</recruitingCategory>
    <name>Accounting</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[<p>We at SEMRON are a young tech startup developing powerful hardware that enables AI applications to run directly on smartphones and other mobile devices—quickly, efficiently, and without cloud dependency.</p><p>Our team consists of 20 people from all over the world. We work with focus but without rigid corporate structures. For us, productivity and a great work atmosphere go hand in hand—we value personal responsibility, short decision-making processes, and open communication.</p><p>We are looking for a reliable and well-structured person to support our accounting team. From processing ongoing business transactions and managing invoices to reconciling accounts—you will ensure that our financial processes run smoothly and on time.</p>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<p><strong>Financial Accounting &amp; Balance Accounting</strong></p><ul><li><p>Independent handling of ongoing financial accounting (DATEV)</p></li><li>Assisting in the preparation of annual financial statements and tax returns in collaboration with the tax advisor</li><li>Processing payroll accounting</li></ul><strong>Grant management</strong><ul><li>Documentation and tracking of grants</li><li>Preparation of fund usage reports</li><li>Communication with grant providers and authorities</li></ul><strong>General accounting and administrative tasks</strong><ul><li>Ensuring proper bookkeeping</li><li>Supporting administrative tasks to optimize internal processes</li><li>Resolving accounting and tax-related issues in collaboration with the tax advisor</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>Experience in financial and/or balance accounting</li><li>Proficient in DATEV or similar accounting software</li><li>Structured, precise, and independent working style</li><li>Experience with grants is a plus</li><li>Excellent German skills (C2), very strong English skills (C1)</li><li>No prior knowledge of semiconductors required</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Why us?</name>
            <value>
                <![CDATA[<ul><li>A dynamic startup culture without unnecessary bureaucracy</li><li>A professional and appreciative work environment</li><li>A centrally located workplace in Dresden</li><li>Modern office equipment and a pleasant working atmosphere – <a href="https://defiant-fiction-58e.notion.site/SEMRON-Office-1987b75c7832808aae9dfa4004027665" target="_blank" rel="noreferrer noopener">feel free to take a look at our office</a></li><li>Flexible working hours</li><li>A long-term perspective with opportunities for growth</li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>entry-level</seniority>
    <schedule>part-time</schedule>
    <occupation>bookkeeping</occupation>
    <occupationCategory>accounting_and_finance</occupationCategory>
    <createdAt>2025-02-26T11:20:57+00:00</createdAt>
</position>

<position>
    <id>1369445</id>
    <office>Dresden, DE (primary site)</office>
    <additionalOffices>
        <office>Austin, TX</office>
    </additionalOffices>
    <department>Software</department>
    <recruitingCategory>Compiler / Software</recruitingCategory>
    <name>Compiler Developer</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[In this role, you are responsible to build a highly scalable compiler toolchain for our future chip generations. You will participate in many fundamental architectural decisions and have the opportunity to contribute on upstream open-source projects.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li>building/maintaining SEMRON's ML compiling toolchain for our accelerator</li><li>design &amp; implement various compiler operations as well as lowering and optimization passes</li><li>collaborate with ML &amp; quantization engineers/researchers to realize compilation of generic NNs for SEMRON's hardware</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>in-depth knowledge of C++</li><li>hands-on experience in compiler technologies like LLVM</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>experience with machine learning compiler infrastructure like MLIR/IREE or TVM</li><li>experience in polyhedral compilation techniques</li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-time</schedule>
    <yearsOfExperience>2-5</yearsOfExperience>
    <keywords>compiler,developer</keywords>
    <occupation>general_and_other_it_software</occupation>
    <occupationCategory>it_software</occupationCategory>
    <createdAt>2016-10-10T11:33:38+00:00</createdAt>
</position>

<position>
    <id>1782870</id>
    <office>Dresden, DE (primary site)</office>
    <additionalOffices>
        <office>Austin, TX</office>
    </additionalOffices>
    <department>Chip Design</department>
    <recruitingCategory>Device Modeling</recruitingCategory>
    <name>Device Modeling Engineer</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[In this role you will be responsible for simulating the physics behind our custom CapRAM device. The derived device models are used by the analog design team to perform circuit simulations with our unique CapRAM device.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li>TCAD simulation</li><li>Setting up Verilog-A &amp; Spectre models, and simulation of these</li><li>Simplification of mathematical device models for faster simulation</li><li>Process engineering to fabricate these devices in R&amp;D and volume fabs</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>3 years of experience/knowledge in device modeling and TCAD simulation</li><li>Understanding of semiconductor device physics</li><li>Knowledge in Synopsys TCAD tools</li><li>Willingness to learn new technologies and tools, and apply them quickly</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>Knowledge in Verilog-A and Spectre simulations</li><li>Semiconductor process/fabrication knowledge</li><li>Process simulation in TCAD tools</li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-time</schedule>
    <occupation>general_and_other_engineering</occupation>
    <occupationCategory>engineering</occupationCategory>
    <createdAt>2024-10-18T11:09:06+00:00</createdAt>
</position>

<position>
    <id>1769149</id>
    <office>Dresden, DE (primary site)</office>
    <department>IT</department>
    <recruitingCategory>Founder&#039;s Associate</recruitingCategory>
    <name>Laboratory Engineer for Semiconductor Test - Work Student</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[In this position you will be responsible for designing test procedures and equipment for our custom semiconductors, as they come from the Fab. You will also design and test our prototype boards.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<h5><br></h5><ul><li>Design mechatronic assemblies for automated test &amp; characterization of dies/wafers of custom ICs</li><li>Program automation routines for automated testing &amp; characterizaion</li><li>Design PCBs for test automation</li><li>Design PCBs for prototype systems with our custom chips</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>Background in component-level circuit design &amp; general electrical engineering</li><li>Interest in test automation for highly integrated analog circuits</li><li>Experience with mechanical CAD design</li><li>Base knowledge / interest to re-learn semiconductor device physics</li><li>Experience with Python scripting or Matlab, LabView</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>Experience with PCB design for analog (low noise) applications</li><li>Experience with application development</li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>intern</employmentType>
    <seniority>entry-level</seniority>
    <schedule>full-or-part-time</schedule>
    <occupation>general_and_other_it_software</occupation>
    <occupationCategory>it_software</occupationCategory>
    <createdAt>2024-10-08T18:54:17+00:00</createdAt>
</position>

<position>
    <id>1468108</id>
    <office>Dresden, DE (primary site)</office>
    <department>IT</department>
    <recruitingCategory>Founder&#039;s Associate</recruitingCategory>
    <name>Laboratory Engineer for Semiconductor Test &amp; PCB Design</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[<p>In this position you will be responsible for designing test procedures and equipment for our custom semiconductors, as they come from the Fab. You will also design and test our prototype boards. </p>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li><p>Design mechatronic assemblies for automated test &amp; characterization of dies/wafers of custom ICs</p></li><li><p>Program automation routines for automated testing &amp; characterizaion</p></li><li><p>Design PCBs for test automation</p></li><li><p>Design PCBs for prototype systems with our custom chips</p></li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li><p>Background in component-level circuit design &amp; general electrical engineering</p></li><li><p>Experience with PCB design for analog (low noise) applications</p></li><li><p>Interest in test automation for highly integrated analog circuits</p></li><li><p>Experience with mechanical CAD design</p></li><li><p>Base knowledge / interest to re-learn semiconductor device physics</p></li><li><p>Experience with Python scripting or Matlab, LabView</p></li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li><p>Background in high-speed digital PCB design</p></li><li><p>Experience with application development</p></li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Why us?</name>
            <value>
                <![CDATA[<ul><li><p>You will get the opportunity to play a critical role in enabling our advanced new-paradigm AI compute chips</p></li><li><p>As our lab engineer, you will have the opportunity to design and shape your own perfect lab environment<br><br><br></p></li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>entry-level</seniority>
    <schedule>full-time</schedule>
    <yearsOfExperience>1-2</yearsOfExperience>
    <occupation>general_and_other_engineering</occupation>
    <occupationCategory>engineering</occupationCategory>
    <createdAt>2024-03-15T15:18:41+00:00</createdAt>
</position>

<position>
    <id>2246552</id>
    <office>Dresden, DE (primary site)</office>
    <additionalOffices>
        <office>Austin, TX</office>
    </additionalOffices>
    <department>Software</department>
    <recruitingCategory>ML</recruitingCategory>
    <name>ML Engineer</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[As an ML Engineer at SEMRON, you will be responsible for developing the training infrastructure that enables models to run efficiently on our novel analog in-memory compute platform. A core part of this work is designing a geo-distributed Quantization-Aware Training (QAT) framework that allows the machine learning community to collectively contribute compute resources, enabling them to quantize their favorite models and make them compatible with SEMRON’s hardware.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li>Design and implement a <strong>geo-distributed QAT system</strong> for preparing models for analog inference</li><li>Build collaborative training and tooling infrastructure that allows users to contribute GPUs and quantize models together</li><li>Translate new quantization and <strong>analog-aware training methods</strong> into robust engineering components</li><li>Collaborate with researchers to integrate their algorithms into a production-grade pipeline</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>A Master’s degree, PhD, or a personal project or open-source contribution that<strong> clearly demonstrates strong engineering skills and a solid understanding of ML tooling</strong></li><li>Fluency in <strong>Python and PyTorch</strong></li><li>Understanding of<strong> training workflows</strong> and <strong>practical experience with model optimization</strong></li><li>Ability to architect and maintain scalable systems, with clean code and clear interfaces</li><li>A collaborative mindset and comfort working across software, research, and hardware domains</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>Prior experience with QAT or other model compression techniques</li><li>Familiarity with projects like<strong> DiLoCo, SWARM</strong>, or other decentralized or peer-to-peer learning systems</li><li>Background in <strong>compiler stacks</strong>, <strong>graph transformations</strong>, or <strong>model deployment tooling</strong></li><li>Contributions to open-source <strong>ML infrastructure</strong> or <strong>research software</strong></li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-time</schedule>
    <occupation>general_and_other_engineering</occupation>
    <occupationCategory>engineering</occupationCategory>
    <createdAt>2025-07-14T19:38:09+00:00</createdAt>
</position>

<position>
    <id>1433496</id>
    <office>Dresden, DE (primary site)</office>
    <additionalOffices>
        <office>Austin, TX</office>
    </additionalOffices>
    <department>Software</department>
    <recruitingCategory>ML</recruitingCategory>
    <name>ML Research Scientist</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[As an ML Research Engineer at SEMRON, you will design the algorithms and quantization schemes that unlock efficient, high-accuracy inference on our analog in-memory compute platform. Your work will bridge cutting-edge quantization research, mathematical modeling, and hardware-aware algorithm design, ensuring that deep neural networks execute with maximal accuracy and throughput on our custom silicon.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li>Research and develop novel<strong> analog-aware quantization methods</strong> (PTQ and QAT) tailored to in-memory compute constraints</li><li>Design mathematically principled <strong>matrix-vector multiplication algorithms</strong> that exploit sparsity, noise resilience, and non-idealities to improve hardware efficiency</li><li><p>Collaborate with analog hardware engineers to <strong>define algorithmic requirements</strong> and guide co-development of compute primitives</p></li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>PhD or equivalent research experience in <strong>machine learning, applied mathematics, or a related field</strong></li><li>Strong understanding of <strong>quantization, model optimization</strong>, and numerical methods for DNNs</li><li>Proficiency in <strong>Python and PyTorch</strong>, with the ability to rapidly prototype and evaluate research ideas</li><li>A research mindset: curiosity, rigor, and the ability to explore and discard ideas efficiently</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>Contributions to quantization libraries or novel compression methods</li><li>Publications in top-tier ML venues (NeurIPS, ICLR, ICML, etc.)</li><li>Familiarity with <strong>analog computation challenges</strong> (noise, nonlinearity, limited precision, etc.) and the ability to abstract them into robust algorithms</li><li>Experience collaborating with hardware teams or formulating algorithm-hardware co-design strategies</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Why us?</name>
            <value>
                <![CDATA[We’re building at the intersection of math, hardware, and machine learning, pushing the boundaries of what's possible in compute. If you’ve implemented your own MVM kernels just to see what happens, trained quantized models for fun, or love thinking deeply about efficiency, sparsity, and how to make models run faster and better, you’ll feel right at home. As a small, technical team, early work defines the future of the stack, and we treat it that way. You'll own critical pieces of what we build, with equity to match. No hierarchy, no bureaucracy, just ideas, experiments, and real impact. You’ll grow as fast as you can grow.]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-time</schedule>
    <occupation>general_and_other_it_software</occupation>
    <occupationCategory>it_software</occupationCategory>
    <createdAt>2024-02-20T14:48:24+00:00</createdAt>
</position>

<position>
    <id>2385356</id>
    <office>Dresden, DE (primary site)</office>
    <additionalOffices>
        <office>Austin, TX</office>
    </additionalOffices>
    <department>Chip Design</department>
    <name>NPU Architect</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[In this role you'll be responsible to design the next iteration of SEMRON's 3D in-memory compute chip. You will collaborate with a team of hardware, compiler and ML engineers to optimise all aspects of executing ML workloads based on our capacitive analog in-memory matrix-vector multiplication units.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li>Design and specify the structure and internal organisation of core architecture modules, aligned with workload requirements and software deployment processes.</li><li>Partner with the software team to evaluate module performance and efficiency for key workloads, uncover performance constraints, and inform architectural choices.</li><li>Monitor emerging trends and research in AI workloads, hardware architectures, and applications to guide the evolution of next-generation architectures.</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>BS/MS/PhD in EE, CS, or a related field</li><li>Understanding in computer architecture, digital design, and micro-architecture concepts</li><li>Familiarity with AI/ML algorithms, frameworks, and workloads</li><li>Programming experience in C/C++ and Python</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>Hands-On Experience with ML Hardware Exploration Frameworks like Timeloop, ZigZag, etc.</li><li>Hands-On Experience with HDLs such as Verilog or System Verilog</li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-time</schedule>
    <yearsOfExperience>2-5</yearsOfExperience>
    <keywords>NPU,System Architecture,AI workloads</keywords>
    <occupation>electrical_and_electronics_engineering</occupation>
    <occupationCategory>engineering</occupationCategory>
    <createdAt>2025-10-14T13:49:51+00:00</createdAt>
</position>

<position>
    <id>1369490</id>
    <office>Dresden, DE (primary site)</office>
    <additionalOffices>
        <office>Austin, TX</office>
    </additionalOffices>
    <department>Chip Design</department>
    <recruitingCategory>Analog</recruitingCategory>
    <name>Senior Analog IC Design Engineer</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[You are responsible to design ultra-low power analog IC periphery blocks for our in-memory computing product. You will involve the design process from the system level decisions to post-layout floor-planning. You will have chance to “invent” new blocks and contribute the patent portfolio of SEMRON.]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you will do:</name>
            <value>
                <![CDATA[<ul><li>Determining the specifications of the analog blocks</li><li>Design &amp; implement ultra-low power analog IC periphery blocks such as: ADC, DAC, LDO, BG Reference, Level-shifters …</li><li>Contribute the layout floor-plan</li><li>Post-layout characterization</li><li>Developing the verification scheme for analog blocks as well as mixed-signal systems from analog perspective</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[<ul><li>5+ years experience </li><li>Extensive knowledge in analog design in theory and having hands-on experience in at least two of the following:</li><li>Data converters,</li><li>Read-out circuits</li><li>Data transfer</li><li>Power management</li><li>Memory periphery</li><li>DC-DC conversion</li><li>At least two successful tape-out</li><li>Experience in chip measurement</li></ul>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>Helpful but not required:</name>
            <value>
                <![CDATA[<ul><li>Having the experience in chip ownership</li><li>Project management experience</li></ul>]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>permanent</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-time</schedule>
    <yearsOfExperience>5-7</yearsOfExperience>
    <occupation>electrical_and_electronics_engineering</occupation>
    <occupationCategory>engineering</occupationCategory>
    <createdAt>2023-12-24T23:50:50+00:00</createdAt>
</position>

<position>
    <id>2554915</id>
    <office>Dresden, DE (primary site)</office>
    <department>Management</department>
    <recruitingCategory>Team Assistance</recruitingCategory>
    <name>Team Assistenz</name>
    <jobDescriptions>
        <jobDescription>
            <name>About the Role</name>
            <value>
                <![CDATA[<p><span><strong>Deine Aufgaben im Detail:</strong></span></p><span>• Schnittstelle zur Buchhaltung</span><br><span>• Office Management</span><br><span>• Team Events organisieren</span><br><span>• Onboarding neuer Mitarbeiter</span><br><span>• Organisation von Reisen und Terminen</span>]]>
            </value>
        </jobDescription>
        <jobDescription>
            <name>What you should bring in:</name>
            <value>
                <![CDATA[Motivation]]>
            </value>
        </jobDescription>
    </jobDescriptions>
    <employmentType>fixed_term</employmentType>
    <seniority>experienced</seniority>
    <schedule>full-or-part-time</schedule>
    <yearsOfExperience>1-2</yearsOfExperience>
    <occupation>general_other_accounting_finance</occupation>
    <occupationCategory>accounting_and_finance</occupationCategory>
    <createdAt>2026-03-05T14:50:56+00:00</createdAt>
</position>

</workzag-jobs>